1. Field of the Invention
The invention relates to a circuit device comprising a first delay circuit for outputting data in response to a pulse of a clock signal and a signal processing circuit for processing said outputted data from said first delay circuit, a signal processing circuit comprising a second delay circuit for output ting data in response to said pulse of said clock signal.
2. Description of Related Art
A circuit device comprising a plurality of D flip-flops which are cascaded, and a circuit device comprising logic circuits and D flip-flops which are alternately cascaded are known in the prior art. In such circuit devices, each of a plurality of D flip-flops receives a clock signal, introduces data thereinto in response to a pulse of the clock signal, and outputs the introduced data.
A clock frequency has been increasing with the faster processing rate of a circuit in recent years, so that a power consumption of the circuit device is increasing. Further, all D flip-flops of the circuit device are supplied with the clock signal, so that if the number of the D flip-flops increases, the power consumption increases accordingly. For the purpose of decreasing the power consumption of the circuit device, it is considered to construct a control circuit which can control whether the supply of the clock signal to the D flip-flops is allowed or blocked. However, if such a control circuit is constructed in a simple manner, there is a problem that not only a data signal to be processed in the circuit device but also a dedicated signal for only driving the control circuit mentioned above are required.
It is an object of the invention to provide a circuit device in which the power consumption can be reduced without the dedicated signal.